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本帖最后由 HDL 于 2022-3-9 09:16 编辑
- module hc4078( //74HC4078 一组八输入端或非门 GND:Pin7 VCC:Pin14
- input in1, //Pin2
- input in2, //Pin3
- input in3, //Pin4
- input in4, //Pin5
- input in5, //Pin9
- input in6, //Pin10
- input in7, //Pin11
- input in8, //Pin12
- output out //Pin13
- );
- assign out = !(|{in1,in2,in3,in4,in5,in6,in7,in8});
- endmodule
- module main(clk,led);
- input clk;
- output reg led;
- wire out;
- hc4078 hc4078(
- .in1(1'b1),
- .in2(1'b0),
- .in3(1'b1),
- .in4(1'b0),
- .in5(1'b1),
- .in6(1'b0),
- .in7(1'b1),
- .in8(1'b0),
- .out(out)
- );
- always @(posedge clk) begin
- led <= out;
- end
- endmodule
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