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本帖最后由 HDL 于 2023-4-1 15:19 编辑
- module ws2812b( //WS2812B全彩RGB LED灯驱动模块 (此模块只能驱动1颗,不支持级联)
- input clk, //50Mhz 时钟输入
- input [7:0] red, //[8位宽]红色值:0~255
- input [7:0] green, //[8位宽]绿色值:0~255
- input [7:0] blue, //[8位宽]蓝色值:0~255
- output reg dout //接ws2812b的din
- );
- initial dout = 1'b0;
- wire [0:23] rgb = {green,red,blue};
- reg [0:23] old = 24'd0;
- reg [11:0] delay = 12'd0;
- reg [1:0] state = 2'd0;
- reg [4:0] i = 5'b0;
- reg run = 1'b0;
- always @(posedge clk) begin
- old <= rgb;
- if(rgb != old) begin
- run <= 1'b1;
- end
- if(run) begin
- if(|delay) begin //有延时
- delay <= delay - 12'd1;
- end else begin //没有延时
- case(state)
- 2'd0:begin //高电平时间
- dout <= 1'b1;
- delay <= rgb[i] ? 12'd43 : 12'd20;
- state <= 2'd1;
- end
- 2'd1:begin //低电平时间
- dout <= 1'b0;
- delay <= rgb[i] ? 12'd20 : 12'd43;
- i = i + 5'd1;
- if(i >= 24) begin
- i = 0;
- state <= 2'd2;
- end else begin
- state <= 2'd0;
- end
- end
- 2'd2:begin //帧复位信号
- dout <= 1'b0;
- delay <= 12'd2500; //延时50us
- state <= 2'd3;
- end
- default:begin
- run <= 1'b0;
- state <= 2'd0;
- end
- endcase
-
- end
- end
- end
- endmodule
- module main(
- input clk, //50Mhz Pin17
- output dout //接WS2812B的din Pin40
- );
- reg [8:0] i = 9'd0;
- wire [8:0] j = i + 9'd170;
- wire [8:0] k = i + 9'd340;
- ws2812b ws2812b(
- .clk(clk),
- .red((i < 256) ? i : 255 - i),
- .green((j < 256) ? j : 255 - j),
- .blue((k < 256) ? k : 255 - k),
- .dout(dout)
- );
- integer t=0;
- always @(posedge clk) begin
- t = t + 1;
- if(t >= 781250) begin
- t = 0;
- i <= i + 9'd1;
- end
- end
- endmodule
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